Watch Dog Timer
LSB test result
ARM*/Intel(R) XScale(TM) Porting Effort for CGL Features (xcgl-port)
The XCGL-PORT project was created to help accelerate ARM/Intel(R) XScale(TM) porting of various features called out by the OSDL CGL Working Group (http://www.osdl.org/projects/cgl/) as a requirement for a Linux system running in a carrier grade environment.
Implementations for many of the CGL features are currently available on x86 based systems, but either not available in production quality or just not available at all for systems based on the ARM/Intel(R) XScale(TM) architecture. This is particularly true of CGL features that are heavily dependant on architecture features such as KDB, the well-known powerful built-in Linux kernel debugger that satisfies the CGL requirements for a kernel level debugger, and LKCD which satisfies other serviceability aspects of the CGL requirements.
The goal for the project is to port the CGL features to the ARM/Intel(R) XScale(TM) architecture and to make it possible that those features can be run on platforms based on these architectures.
Development is initially based on the Intel(R) DBPXA250 and the Intel(R) IXCDP110 development boards, but it is expected that most features will work on any ARM based systems without any or with only little changes to the codes provided xcgl-port. When a given port of an implementation is dependant on a sub-architecture specific feature (like KDB, whose breakpoint mechanism is based on the debug unit functionality provided by Intel(R) XScale(TM) ), then that dependency will be clearly documented.
All code developed under this project will be contributed back to the original project in accordance to the rules/procedures followed by that project. Once a given implementation has published full support for the ARM/Intel(R) XScale(TM) architecture, the xcgl-port project will add a link to that implementation to aid those trying to gather ARM/Intel(R) XScale(TM) enabled feature implementations.
The features currently being worked on and the supported development board(s) / architecture(s):
Watchdog Timer (Intel(R) PXA250/Intel(R) IXC1100) KDB (Intel(R) XScale(TM)) LKCD NPTL IPv6/MIPv6/IPSECv6 LSB (Test result and summary) Application Heart Beat Monitor
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